基于信號(hào)延時(shí)對(duì)消法的軟件鎖相環(huán)設(shè)計(jì)

張文濤，胡伯勇，陸陸，鐘文晶

摘 ?要： 在分布式并網(wǎng)發(fā)電系統(tǒng)中，在三相電網(wǎng)電壓不平衡和電壓波形嚴(yán)重畸變條件下，傳統(tǒng)的軟件鎖相環(huán)已經(jīng)不能快速和準(zhǔn)確的跟蹤電網(wǎng)電壓的頻率和相位，因而無法獲得很好的并網(wǎng)控制性能，此處對(duì)傳統(tǒng)的軟件鎖相環(huán)的工作原理和不平衡電網(wǎng)條件下鎖相失效的原因進(jìn)行了分析，在此基礎(chǔ)上提出一種基于信號(hào)延時(shí)對(duì)消的軟件鎖相技術(shù)。該基于DSC的軟件鎖相環(huán)將電網(wǎng)電壓經(jīng)坐標(biāo)變換后的電壓分量延時(shí)四分之一個(gè)工作周期來實(shí)現(xiàn)對(duì)電壓正負(fù)序分量的快速提取，并通過選擇合適的參數(shù)，消除了負(fù)序分量的影響。在MATLAB仿真環(huán)境下，搭建鎖相環(huán)仿真模型，驗(yàn)證了本方案的正確性和可行性。

關(guān)鍵詞： 電壓不平衡;軟件鎖相環(huán);信號(hào)延時(shí)對(duì)消;正負(fù)序分量

中圖分類號(hào)： TP3 ? ?文獻(xiàn)標(biāo)識(shí)碼： A ? ?DOI：10.3969/j.issn.1003-6970.2019.12.040

本文著錄格式：張文濤，胡伯勇，陸陸，等. 基于信號(hào)延時(shí)對(duì)消法的軟件鎖相環(huán)設(shè)計(jì)[J]. 軟件，2019，40（12）：178182

Design of Software Phase-locked Loop Based on Signal Delay Cancellation

ZHANG Wen-tao1，2， HU Bo-yong1， LU Lu2， ZHONG Wen-jing2

（1. Zhejiang Provincial Key Laboratory of Energy Conservation & Pollutant Control Technology for Thermal Power，

Hangzhou 311121， China; 2. Zhejiang Energy Group R&D， Hangzhou 311121， China）

【Abstract】： In a distributed grid system， under unbalanced and distorted voltage conditions， the traditional software phase-locked loop can not track the grid voltage frequency and phase quickly and accurately， so it fails to perform well in network control. In this paper the operational principle and the reasons of becoming invalid in unbalanced there-phase grid voltage situation of the traditional software has been analyzed. Therefore， the technique has been presented based on DSC. This voltage component is obtained through coordinate transformation of the grid voltage. And by delaying a quarter of a duty cycle， it achieves rapid extraction of the positive and negative sequence voltage components. And by selecting the appropriate parameters， it can eliminate the harmonics. In MATLAB simulation environment， the correctness and feasibility of the program has been verified by building up phase-locked loop simulation models.

【Key words】： Unbalanced and distorted voltage conditions; Phase locked loop; signal delay cancellation; Positive and negative sequence components

0 ?引言

在電網(wǎng)電壓出現(xiàn)不平衡、電網(wǎng)中含有諧波及電網(wǎng)受到與電網(wǎng)連接的其他設(shè)備的污染時(shí)，理想的信號(hào)同步技術(shù)[1]應(yīng)該滿足：（1）能夠精確的檢測(cè)出電網(wǎng)的相角;（2）可以快速跟蹤電網(wǎng)相位和頻率的變化;（3）能夠有效的抑制電網(wǎng)諧波和擾動(dòng)。在考慮了這三方面因素之外，還要考慮信號(hào)同步技術(shù)實(shí)現(xiàn)的成本、電路結(jié)構(gòu)是否簡(jiǎn)單及系統(tǒng)運(yùn)行的可靠性。在眾多信號(hào)同步技術(shù)中，鎖相技術(shù)由于其良好的性能和穩(wěn)定的控制，逐漸成為最熱門的技術(shù)之一。鎖……