Design and implemented motion control system based on FPGA

Zhi CHEN, Zhan-tian QIN

(School of Mechanical Engineering, Guilin University of Aerospace Technology, Guilin 541004, China)

Abstract: This paper presents a novel method to implement a motion control system based on FPGA. The functional modules include: clock generator, data communication module, Nios II softcore CPU, PWM pulse generator, and measurement module. A trajectory generator employing the digital convolution method is implemented in the Nios II softcore, resulting in lower computing load and higher motion smoothness. The functional modules simulation and experiments show that the proposed motion control system is feasible and effective.

Key words: Motion controller, FPGA, Digital convolution

1 Introduction

Motion control system is the key component for the aviation and aerospace field, high-speed rail system, and industrial automation [1-2]. With the development of embed control technology, there are various methods to achieve the motion control system, such as DSP, DSP+CPLD, DSP+FPGA, and ARM. These methods need more than one CPU, resulting in high cost. Moreover, it is not convenient to modify the system to adapt to different systems [3-5].

Acceleration/Deceleration (Acc/Dec) control is the key aspect of the motion control system. The Acc/Dec control methods include: trapezium Acc/Dec, exponential Acc/Dec, and S-curve Acc/Dec. The order of these Acc/Dec methods is less than or equal to three [6]. However, higher than third order Acc/Dec is needed, especially in accuracy control occasion. The currently used polynomial based Acc/Dec methods may increase computation complexity as the order is higher than the third [7-8]. Consequently, increasing the computing burden of the hardware system, and reducing the working efficiency of the system. The convolution based Acc/Dec is appearing to solve this problem, because the convolution operation only needs two add and one division operations. Compared with the polynomial based Acc/Dec, the convolution based Acc/Dec is more applicable to the higher order Acc/Dec control.

Above all, this paper focuses on how to design and realize motion control system based on FPGA, and how to realize better high order Acc/Dec control with convolution based method. The simulation and experiment results verify the motion control system is efficient and feasible, furthermore, the fourth order Acc/Dec planning is realized to follow the position command with high control precision.

2 FPGA based motion control system

2.1 The hardware structure of the FPGA based motion control system

The hardware structure of the FPGA based motion control system is shown in Fig.1. The core function of the motion control algorithm is realized in FPGA hardware circuit. The command information and monitoring feedback of the motion control system is implemented in the host computer. Servo drives and motors are the control object. The link information between the control object and FPGA hardware circuit include control command and motion information (velocity and position). The FPGA hardware circuit consists of FPGA (Cyclone IV) for operating control algorithms, single-ended to difference chip (MC3487) for PWM transmission, and difference to single-ended chip (MC3486) for encoder signal transmission. The core function of motion control is realized by programing in the FPGA. According to the practice system requirements, the motion control system is easy to output multichannel PWM for multi-axis motion control by cutting and expanding the FPGA internal functions.

Fig.1 The hardware structure of the FPGA based motion control system

2.2 The internal function modules of FPGA

Fig.2 shows the internal function modules of FPGA for the motion control system. These modules include a clock module, data communication interface, Nios II softcore, PWM pulse generator, and measurement unit, etc. The clock module generates required clock signals for every module by frequency multiplier and frequency divider. The data communication interface links the host computer and the Nios II softcore for transmitting command and feedback signals. Nios II softcore is a system on a programable chip (SOPC) to realize the core function of the motion control algorithm. These functions include trajectory generator, PID controller, and data calculator. The measurement unit acquires the measured values of the encoder sensor. The measured values are used to compute the velocity and position with the data calculator in the Nios II softcore. PWM pulse generator generates PWM signal and direction signal according to the control value from the PID controller. Then the PWM control signal output to control the servo drive and motor.

Fig.2 The internal function modules of FPGA

The clock module, data communication interface, Nios II softcore, PWM pulse generator, and measurement unit are implemented with the Quartus II software. The clock frequency multiplier is realized by ALTPLL (Intellectual property) IP core. Nios II softcore is come true by configuring SOPC Builder. The other modules are realized by compiling Verilog HDL (hardware description language). The internal function of the softcore is realized by compiling code in the Nios II software.

2.3 Clock module

The input clock signal of the clock module is 50 MHz. The PLL (phase locked loop) generates 100 MHz clock signal (clk1) for Nios II software. The clock divider generates 1 KHz clock signal (clk2) for the measurement unit. The 50 MHz system clock signal is also used for the data communication module and PWM pulse generator.

2.4 Nios II softcore

The Nios II softcore implements the trajectory generator, PID controller, and data calculator. The trajectory generator generates motion continuous and smooth trajectory with the convolution based Acc/Dec method. The PID controller gets the command from trajectory generator and feedback from the data calculator, and outputs control value for the PWM module, so that a close loop is achieved.

2.5 PWM pulse generator

The function structure of the PWM pulse generator is shown in Fig.3. PWM pulse generator receives control values from the PID controller, and generates a direction signal and PWM signal with the duty ratio of fifty percent and variable frequency.

Fig.3 The function structure of PWM pulse generator

With the help of the latch signal, the control value from the PID controller is latched in the data latch module. The control value (Cv) is calculated by

(1)

Direction discrimination module obtains direction signal DIR by judging the plus or minus of the control value. The DIR is set to 1 when the movement is positive, or else is set to 0 when the movement is negative. The absolute value module gets the absolute value of the control value, to determine the period of the PWM signal. The half-value module gets half of the control value, to determine the half of the period, so that the duty ratio of the PWM is sure to fifty percent. The time counter is increasing counting until up to control value, then reset to 1. The comparator A compares the absolute value of control value with the count value of the time counter. If the count value is equal to the control value, a trigger signal T_L is rendered. The comparator B compares the half of control value with the count value of the time counter. If the count value is equal to the half of control value, a trigger signal T_H is output. Execute module generate the PWM signal under the effect of the trigger signals T_L and T_H. A positive edge of the PWM is produced when T_H is effective. But a negative edge of the PWM is produced when T_L is effective.

The principle of the PWM generator is described in Fig.4. Assume that control valueCvis eight, the count value CNT is added from 1 to 8, when CNT up toCv, then the counter reset to 1 for another period. When CNT is up to 4, positive edge signal T_H is generated. When CNT is up to 8, the T_L is generated. PWM generates positive edge event under the effect of T_H, or else generate negative edge event under the effect of T_L. the frequency of the PWM signal is variable as the control valueCvis variation.

Fig.4 The principle of the PWM generator

2.6 Measurement unit

Fig.5 shows the function module of the measurement unit. The input signal is quadrature signal A and B of the encoder. Direction detection module gets the motion direction by judging signal A is leading or lagging than signal B. F_Dir is 1, when the movement direction is positive. F_Dir is 0, when the movement direction is negative. The quadruple frequency module produces a signal whose frequency is four time of the input signal A and B, so that the measurement resolution is improved. The positive edge detection module detects the positive edge of the quadruple frequency signal and serves as the count signal of the counter. The pulse counter is working when the positive edge of the quadruple frequency signal is effective. The pulse counter pluses one when the direction is positive, else minuses one when the direction is negative. The latch module latches the count value of the pulse counter. Then the data F_Data is used to calculate the velocity and position in the Nios II.

Fig.5 The function module of the measurement unit

3 Trajectory plan method

The trajectory generator in Nios II softcore gets the command from what the host computes, and generates the smooth accelerate curve, velocity curve, and position curve by performing Acc/Dec control algorithm. In this paper, the Acc/Dec control employs convolution based Acc/Dec method, which has less computation, less input parameter than the polynomial based Acc/Dec control method.

3.1 Convolution method

Assume a convolution functionH(k) is

(2)

wheremis time parameter for the convolution function.

Also assume an input sequenceX(k), after executing a convolution operation betweenX(k) andH(k), output sequenceY(k) is expressed as

(3)

The convolution operation includes two add operation and one division operation, so that the convolution method can reduce the compute complexity in the Acc/Dec control.

3.2 Convolution based Acc/Dec method

Fig.6 gives the principle of realizing fourth order Acc/Dec control based on convolution method.

Fig.6 The principle of realizing fourth order Acc/Dec control based on convolution method

The time parametersm、m1、m2、m3is calculated as：

(4)

(5)

(6)

(7)

Where,Tsis sample time，Sis position，Vmax、Amax、jmax、dmaxare maximum velocity, maximum acceleration, maximum jerk, maximum jounce, respectively.

The fourth order Acc/Dec result is

(8)

3.3 Trajectory generator realization

The trajectory generator gets the input parametersTs、S、Vmax、Amax、jmax、dmaxfrom the host computer, then carry out the follow steps.

Step1：Get input sequenceX0(kTs)=Vmax;

Step2：Computem、m1、m2、m3;

Step3：Compute convolution functionH1(kTs),H2(kTs),H3(kTs)；

Step4：Execute third convolution operation to get velocity sequenceX3(kTs)；

Step5：Execute accumulated sum to get positon curve；

Step6：Execute differential operation to get acceleration curve, jerk curve, jounce curve.

4 Simulation and experiment

4.1 Simulation validation

To verify the feasibility and effectiveness, a FPGA internal function module is simulated in Quartus II software. Fig.7 shows the wave simulation of the PWM generator. The input system clock signal clk is 50 MHz (the period is 20 ns). The input control value (Data) is 20, so that the period of output PWM is 400ns. If the input control value (Data) is 40, the period of output PWM is 800 ns. The duty ratio of the PWM signal is 50 percent. The control value (Data) is a positive number, so that the direction signal DIR is high level (1). The simulation results verify the PWM pulse generator can output the variable frequency PWM signal, and the frequency is precise according to the input control value.

Fig.7 The wave simulation of PWM generator

4.2 Experiment validation

In order to verify the motion control system, a single-axe motion control experiment is performed according the platform as shown in Fig.1. The motion control algorithm is running in the FPGA, the control object is servo drive. The related data is transferred to the host computer and restored to observe the experiment result.

The given parameter isS=0.04 mm,Vmax=0.02 mm/s,Amax=0.02 mm/s2,jmax=0.04 mm/s3,dmax=0.01 mm/s4. Fig.8 shows the position following effect and the follow error. Viewing from the experiment result, the motion control system can follow the given position command and can reach to the terminal point 0.04 mm, and the following error is less than 0.75 mm.

Fig.8 The position following effect and the follow error

From the simulation and experiment results, the feasibility and effectiveness of FPGA based motion control system are verified. Moreover, convolution based Acc/Dec control method is able to conveniently realize a higher trajectory plan, so that the movement effect is smoother, and the following error is smaller.

5 Conclusion

This paper realized the motion control system based on the FPGA, the trajectory generator applied the convolution based Acc/Dec control method, resulting reducing compute complexity under the condition of ensuring the motion precision. The simulation and experiment results verified the feasibility and effectiveness of the motion control system, also the motion precision is improved. According to the flexible and expandability, the system can be expanded to two or more axes motion control system.