吳承勇 崔慧敏
摘 要:該報告針對Godson-D的芯片特征和億級并發負載的特征,研究了層次化MapReduce編程模型,對上層應用呈現簡潔的編程接口,并利用OpenCL來開發Godson-D芯片的計算能力。對其中的3個關鍵問題進行了闡述:形成了完整的層次化MapReduce編程模型的框架,并實現了原型系統,旨在解決現有MapReduce模型在多核/眾核芯片組成的集群中存在的性能墻、在適用場景方面存在的無法適應增量式分析這兩個主要的問題;為了解決Godson-D上的編程困難問題,該研究提出使用OpenCL編寫程序,并配套開發CPU+Godson-D異構系統中OpenCL編譯/運行時系統的解決方案。在該研究中,首先完成了OpenCL編譯/運行時支持系統的框架設計,該框架采用層次化設計思想,分為功能層、優化層、平臺層;多核/眾核處理器及云計算被認為將會統治計算領域的未來,多核/眾核處理器在目前的云計算數據中心中被廣泛采用,但是目前其資源利用率非常低,主要原因在于核間性能干擾的存在,使得數據中心的調度程序不得不禁止關鍵應用的co-location來保證QoS,為此,提出了一種基于統計學習的多核間性能干擾分析方法,可以量化地分析任意程序遭受的核間性能干擾,并根據干擾模型提高資源的利用率。
關鍵詞:異構集群 編程環境 異構芯片 編譯技術
Abstract:Based on the chip architecture and the features of highly concurrent workloads, this report discussed the hierarchical MapReduce programming model, to expose a user-friendly programming interface and leverage OpenCL to take advantange of the computing power of Godson-D processor. This report presented three key ideas in detail:(1) Existing MapReduce programming model has two disadvantages: it cannot take advantage of the computing power of underlying multi/many-core processors, and it cannot adapt for increamental analysis. To address these two problems, we proposed the hierarchical MapReduce programming framework implements a prototype.(2) To provide a user-friendly programming interface for Godson-D, we proposed a OpenCL compiler/runtime system for Godson-D. We designed a hierarchical hetergeneous compiler/runtime system for Godson-D, which includes functional level, optimization level and platform level.(3) Despite their widespread adoption in cloud computing, multicore processors are heavily under-utilized in terms of computing resources. To avoid the potential for negative and unpredictable interference, co-location of a latency-sensitive application with others on the same multicore processor is disallowed, leaving many cores idle and causing low machine utilization. To enable co-location while providing QoS guarantees, it is challenging but important to predict performance interference between co-located applications.We proposed a regression approach to predict the interference and improve the resource utilization.
Key Words:Hertergeneous clusters;Programming enviornment;Hetergeneous chip;Compiler
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